Samsung Electronics establishes semiconductor packaging working group

In order to strengthen cooperation with large-scale foundry customers in the packaging field, Samsung Electronics DS Division established a Semiconductor Packaging Task Force (TF) in mid-June, directly led by DS Division CEO Kyung Kye-hyun.

According to Korean media BusinessKorea, the Samsung Electronics Semiconductor Packaging Task Force (TF) is made up of engineers from the DS division's Test and System Packaging (TSP), researchers from the Semiconductor R&D Center, and directors of the company's memory and wafer manufacturing divisions.

The report pointed out that as the miniaturization of circuits in the front-end process has reached its limit, "3D packaging" or "chiplet" technology is attracting investment from manufacturers. Data from market research agency Yole Development shows that in 2022, Intel and TSMC respectively account for 32% and 27% of global advanced packaging investment. Samsung ranks fourth, behind ASE in Taiwan.

It is reported that Samsung Electronics will launch the 3D stacking technology "X-Cube" in 2020, focusing on applications such as high-performance computing processors, 5G networking data chips, and AI computing chips. The company's DS department is also at the Hot Chips held in June last year. It is revealed that it is developing 3.5D advanced packaging technology.